Product Summary
The MACH210-15JC is a member of AMD high-performance EE CMOS MACH 2 device family. This device has approximately six times the logic macrocell capability of the popular PAL22V10 without loss of speed. The MACH210-15JC consists of four PAL blocks interconnected by a programmable switch matrix. The four PAL blocks are essentially PAL22V16 structures complete with product-term arrays and programmable macrocells, including additional buried macrocells. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. The MACH210-15JC has dedicated buried macrocells which, in addition to the capabilities of the output macrocell, also provide input registers or latches for use in synchronizing signals and reducing setup time requirements.
Parametrics
MACH210-15JC absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature with Power Applied: -55℃ to +125℃; (3)Supply Voltage with Respect to Ground: -0.5 V to +7.0 V; (4)DC Input Voltage: -0.5 V to VCC + 0.5 V; (5)DC Output or I/O Pin Voltage: -0.5 V to VCC + 0.5 V; (6)Static Discharge Voltage: 2001 V; (7)Latchup Current (TA = 0℃ to +70℃): 200 mA.
Features
MACH210-15JC features: (1)44 Pins; (2)64 Macrocells; (3)7.5 ns tPD Commercial; 12 ns tPD Industrial; (4)133 MHz fCNT; (5)38 Inputs; 210A Inputs have built-in pull-up resistors; (6)Peripheral Component Interconnect (PCI) compliant; (7)32 Outputs; (8)64 Flip-flops; 2 clock choices; (9)4 PAL22V16 blocks with buried macrocells; (10)Pin-compatible with MACH110, MACH111, MACH211, and MACH215.
Diagrams
MACH X |
PROGRAMMER MACH X PIC HI-SPEED |
Data Sheet |
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MACH110-10JC |
Other |
Data Sheet |
Negotiable |
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MACH110-12 |
Other |
Data Sheet |
Negotiable |
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MACH110-15 |
Other |
Data Sheet |
Negotiable |
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MACH110-15JC |
Other |
Data Sheet |
Negotiable |
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MACH110-15JC-18JI |
Other |
Data Sheet |
Negotiable |
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