MC9S12DG128CFUE

Product Summary

The MC9S12DG128CFUE is a 16-bit microcontroller unit (MCU) composed of standard on-chip peripherals . The MC9S12DG128CFUE includes a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit analog-to-digital converters (ADC), an 8-channel pulse-widthmodulator (PWM), a digital Byte Data Link Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules (MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12DG128CFUE has full 16-bit data paths throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements.

Parametrics

MC9S12DG128CFUE absolute maximum ratings: (1)I/O, Regulator and Analog Supply Voltage, VDD5: -0.3 to 6.0 V; (2)Digital Logic Supply Voltage, VDD: -0.3 to 3.0 V; (3)PLL Supply Voltage, VDDPLL: -0.3 to 3.0 V; (4)Voltage difference VDDX to VDDR and VDDA, △VDDX: -0.3 to 0.3 V; (5)Voltage difference VSSX to VSSR and VSSA, △VSSX: -0.3 to 0.3 V; (6)Digital I/O Input Voltage, VIN: -0.3 to 6.0 V; (7)Analog Reference, VRH, VRL: -0.3 to 6.0 V; (8)XFC, EXTAL, XTAL inputs, VILV: -0.3 to 3.0 V; (9)TEST input, VTEST: -0.3 to 10.0 V; (10)Instantaneous Maximum Current, Single pin limit for all digital I/O pins 3, ID: -25 to +25 mA; (11)Instantaneous Maximum Current, Single pin limit for XFC, EXTAL, XTAL4, IDL: -25 to +25 mA; (12)Instantaneous Maximum Current, Single pin limit for TEST 5, IDT: -0.25 to 0 mA; (13)Storage Temperature Range, Tstg: – 65 to 155℃.

Features

MC9S12DG128CFUE features: (1)HCS12 Core: 16-bit HCS12 CPU; (2)CRG (Clock and Reset Generator); (3)8-bit and 4-bit ports with interrupt functionality; (4)Two 8-channel Analog-to-Digital Converters; (5)Three 1M bit per second, CAN 2.0 A, B software compatible modules; (6)Enhanced Capture Timer; (7)Programmable period and duty cycle; (8)8-bit 8-channel or 16-bit 4-channel; (9)Separate control for each pulse width and duty cycle; (10)Center-aligned or left-aligned outputs; (11)Programmable clock select logic with a wide range of frequencies; (12)Fast emergency shutdown input; (13)Usable as interrupt inputs.

Diagrams