MC9S12A128CFUE

Product Summary

The MC9S12A128CFUE microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules(MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12A128CFUE has full 16-bit data paths throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory of the MC9S12A128CFUE can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements.

Parametrics

MC9S12A128CFUE absolute maximum ratings: (1)I/O, Regulator and Analog Supply Voltage VDD5: -0.3 to 6.0 V; (2)Digital Logic Supply Voltage VDD: -0.3 to 3.0 V; (3)PLL Supply Voltage 2 VDDPLL: -0.3 to 3.0 V; (4)Voltage difference VDDX to VDDR and VDDA DVDDX: -0.3 to 0.3 V; (5)Voltage difference VSSX to VSSR and VSSA DVSSX: -0.3 to 0.3 V; (6)Digital I/O Input Voltage VIN: -0.3 to 6.0 V; (7)Analog Reference VRH, VRL: -0.3 to 6.0 V; (8)XFC, EXTAL, XTAL inputs VILV: -0.3 to 3.0 V; (9)TEST input VTEST: -0.3 to 10.0 V.

Features

MC9S12A128CFUE features: (1)16-bit HCS12 CPU; (2)CRG (Clock and Reset Generator); (3)8-bit and 4-bit ports with interrupt functionality; (4)Memory, 128K Flash EEPROM, 2K byte EEPROM, 8K byte RAM; (5)Two 8-channel Analog-to-Digital Converters; (6)Three 1M bit per second, CAN 2.0 A, B software compatible modules; (7)Enhanced Capture Timer; (8)8 PWM channels; (9)Serial interfaces; (10)Byte Data Link Controller (BDLC); (11)SAE J1850 Class B Data Communications Network Interface; (12)Inter-IC Bus (IIC); (13)112-Pin LQFP and 80-Pin QFP package options.

Diagrams