XC2VP30-5FFG896C

Product Summary

The XC2VP30-5FFG896C is a Platform Flash In-System Programmable Configuration PROM. Available in 1 to 32 Megabit (Mbit) densities, the device provides an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA configuration bitstreams. The XC2VP30-5FFG896C includes 32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master Serial, Slave Serial, Master SelectMAP, and Slave SelectMAP FPGA configuration modes.

Parametrics

XC2VP30-5FFG896C absolute maximum ratings: (1)Internal supply voltage relative to GND: -0.5V to +2.7V; (2)I/O supply voltage relative to GND:-0.5V to +4.0V; (3)JTAG I/O supply voltage relative to GND:-0.5V to +4.0V; (4)Input voltage with respect to GND: VCCO < 2.5V:-0.5V to +3.6V, VCCO ≥ 2.5V:-0.5V to +3.6V ; (5)Voltage applied to High-Z output: VCCO < 2.5V:-0.5V to +3.6V, VCCO ≥ 2.5V:-0.5V to +3.6V; (6)Storage temperature (ambient): -65℃ to +150℃; (7)Junction temperature :+125℃.

Features

XC2VP30-5FFG896C features: (1)In-System Programmable PROMs for Configuration of Xilinx FPGAs; (2)Low-Power Advanced CMOS NOR FLASH Process; (3)Endurance of 20,000 Program/Erase Cycles; (4)Operation over Full Industrial Temperature Range(–40℃ to +85℃); (5)IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing; (6)JTAG Command Initiation of Standard FPGA Configuration; (7)Cascadable for Storing Longer or Multiple Bitstreams; (8)Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ) ; (9)I/O Pins Compatible with Voltage Levels Ranging From 1.5V to 3.3V ; (10)Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages; (11)1.8V supply voltage; (12)Serial or parallel FPGA configuration interface(upto33MHz); (13)Available in small-footprint VO48, VOG48, FS48, and FSG48 packages; (14)Design revision technology enables storing and accessing multiple design revisions for configuration; (15)Built-in data decompressor compatible with Xilinx advanced compression technology.

Diagrams